Isynchronise Enters Global IP Expansion Phase Isynchronise has moved into a high-intensity Intellectual Property (IP) development cycle. As the preparation to scale the programmable DSP and system control solutions globally, securing the innovations is a top priority. Strategic Focus: Patent protection will be filed across key jurisdictions, with a specific focus on the Far…

Isynchronise has been an open source project to identify the legacy issues inherited from natural language impacting parallelism and high performance computing, and to refactor formal and programming language structures, and downstream models of computation. To advance the project generally, and to develop new architectural concepts for a system control chip and a programmable DSP…

New work involves a programmable DSP aimed at advanced predictive modelling, image enhancement, computer vision, and adaptive filtering. Although the Synchronic approach offers significant benefits, wire based connectivity poses a chip area challenge, which does not however apply in the context of a programmable DSP.

Recent work on developing a chip architecture, suggests existing FPGAs are more suitable than earlier thought, as targets for synchronic computation. Strategically and practically this would offer considerable benefits. Consequently a pivot away from chip design, to focus exclusively on novel forms of high level synthesis is being considered.

Isynchronise is developing innovative approaches to languages, compilers and reconfigurable processors, arising from a novel textual language system, and associated families of formal models of computation. The basic insight is that textual programming languages have until now been based on a natural language based conception of the relationship between syntax and semantics, which historically evolved…

There is some good discussion on the spatial approach and synchronic computation here; (http://lambda-the-ultimate.org/node/5614).

Interpretable machine learning is potentially landmark research. Developed originally at Duke University and then at the University of Maine, ProtoPNet provides a means of resolving the mystery of how deep neural networks classify inputs.

What future for the Von Neumann paradigm of computer architecture? AMD is to acquire Xilinx, after Intel got Altera. Is this the beginning of a shift away from ISA, or a last ditch attempt to rescue it?  

The promise of monolithic 3d integrated circuits, with multiple die layers connected through monolithic vias, has been held back in part by their thermal characteristics. This research from Ecole Polytechnique Federale de Lausanne may offer a solution by combining microfluidics and electronics within the same die layer to produce a monolithically integrated cooling structure. #3dChips…

Currently logic functions in reconfigurable architectures are implemented using relatively large scale LUTs. This research from Nanjing University and the National Institute for Materials Science in Japan, shows how just several transistors making up the same logic circuit, can be tuned to implement a 2:1 multiplexer, D-latch and 1-bit full adder and subtractor. #fpgas #circuits…